Ph.D. Research Talks
Mayank Yadav
(Indian Institute of Science)
Talk Title:
Proposal to Achieve the Ultimate Holding Voltage Tunability in Silicon Controlled Rectifiers (SCRs) for a Wide Range of ESD Protection Application.
Abstract:
A novel silicon-controlled rectifier (SCR) concept for on chip ESD protection is proposed with holding voltage tunability from as low as 2V to the well breakdown voltage (10V). The novel proposal replaces the standard N+ and P+ implants in N-Tap/Cathode and P-Tap/Anode by P+-N+ implant and N+-P+ implants, respectively. Detailed physical insight of the proposed concept and several derivative concepts is given, explaining the trigger and holding voltage tunability. Besides, additional, rather refined, tunability is depicted by engineering the junction profile of the P+-N+ and N+-P+ implants. The proposed concept together with the junction profile engineering demonstrates the ultimate holding voltage tunability.
Mitesh Goyal
(Indian Institute of Science)
Talk Title:
Novel Trigger Circuit & SCR Device Co-Engineering Based Local (I/O-VSS & I/O-VDD) ESD Clamp Concepts
Abstract:
In this presentation, a novel silicon-controlled rectifier (SCR) based local protection concept will be presented with co-engineered device and trigger circuit. This scheme results in improved latch-up robustness, lower PAD capacitive loading and lower leakage when compared to the reference (state-of-the-art till date) concept. The proposed and reference concepts are realized in Samsung 28nm process for experimental validation and benchmarking. Its TLP/vf-TLP characteristics and other ESD measurement results along with the design trade-offs are presented and compared with the reference concept. A TCAD based device and circuit co-optimization (DTCO) methodology is also presented. The proposed concept can realize the demanding I/O needs of SCR based local clamps, qualified for HBM to CDM time domains, and meeting ESD specs required for high speed I/O buffers.
Harsh Raj
(Indian Institute of Science)
Talk Title:
Dynamic Breakdown Voltage and Overvoltage Margin in beta-Ga2O3 based devices
Abstract:
In this presentation, we report transient breakdown voltage of on-wafer β-Ga2O3 Schottky barrier diodes (SBDs) in ultra-short (sub-μs duration) pulses based on an electrostatic discharge system setup. β-Ga2O3 SBDs show a dynamic breakdown of 800 V in 10 ns pulse excitations, twice that of the static breakdown. Additionally, the device can withstand overvoltage pulse stresses for varying number of switching cycles at pulse durations below 100 ns. Detailed experimental analysis reveals the role of trap states and trapping-induced temporal and spatial field evolution in the observed device behavior. A clear understanding of the device degradation mechanism in these overvoltage stresses is needed for design of devices with improved reliability under rapid switching events that they may be subjected to in power electronic circuits.
